- RS庫存編號:
- 171-3006
- 製造零件編號:
- 74HC74D
- 製造商:
- Toshiba
當前暫無庫存,可於2024/9/17發貨,3 工作日送達。
已增加
單價 个(每带 2500 )
HK$1.841
單位 | Per unit | Per Reel* |
2500 - 2500 | HK$1.841 | HK$4,602.50 |
5000 - 7500 | HK$1.804 | HK$4,510.00 |
10000 + | HK$1.768 | HK$4,420.00 |
* 參考價格 |
- RS庫存編號:
- 171-3006
- 製造零件編號:
- 74HC74D
- 製造商:
- Toshiba
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
The 74HC74D is a high speed CMOS D FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of theCLOCK pulse. CLEAR and PRESET are independent of the CLOCK and are accomplished by setting the appropriate input to an "L" level. All inputs are equipped with protection circuits against static discharge or transient excess voltage
High speed: fMAX = 77 MHz (typ.) at VCC = 5 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
For products that are Customized and under Non-cancellable & Non-returnable, Sales & Conditions apply.
規格
Attribute | Value |
---|---|
Logic Family | 74HC |
Logic Function | D Type |
Output Type | CMOS |
Output Signal Type | Differential |
Triggering Type | Positive Edge |
Polarity | Inverting |
Mounting Type | Surface Mount |
Package Type | SOIC |
Pin Count | 14 |
Set/Reset | Preset |
Number of Elements per Chip | 2 |
Maximum Propagation Delay Time @ Maximum CL | 190 ns @ 50 pF |
Maximum Operating Supply Voltage | 6 V |
Dimensions | 8.95 x 3.9 x 1.38mm |
Minimum Operating Supply Voltage | 2 V |
Maximum Operating Temperature | +85 °C |
Propagation Delay Test Condition | 50pF |
Length | 8.95mm |
Minimum Operating Temperature | -40 °C |
Width | 3.9mm |
Height | 1.38mm |