The KSZ8851 is a single-port controller chip with a SPI or 8-/16-/32-bit non-PCI CPU interface. Available in 32-/48-/128-pin packages, the KSZ8851 is for applications requiring cost-effective, high-throughput Ethernet connectivity in traditional embedded systems with MCUs or MPUs.
Integrated MAC and PHY Ethernet Controller Designed for high performance and high throughput applications Supports 10BASE-T/100BASE-TX Supports full-duplex flow control and half-duplex back pressure collision flow control Supports DMA-slave burst data read and write transfers Supports IP Header (IPv4)/TCP/UDP/ICMP checksum generation and checking Supports IPv6 TCP/UDP/ICMP checksum generation and checking Automatic 32-bit CRC generation and checking Simple SRAM-like host interface easily connects to most common embedded MCUs. Supports multiple data frames for transmit and receive without address bus and byte-enable signals Supports both Big- and Little-Endian processors
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