The 74VHC573FT is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE). When the OE input is high, the eight outputs are in a high impedance state. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages
Wide operating temperature range: Topr = -40 to 125 High speed: fMAX = 180 MHz (typ.) at VCC = 5.0 V Low power dissipation: ICC = 4.0 μA (max) at Ta = 25 High noise immunity: VNIH = VNIL = 28% VCC (min) Power-down protection is provided on all inputs. Balanced propagation delays: tPLH ≈ tPHL Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V Low noise: VOLP = 1.0 V (max) Pin and function compatible with the 74 series (74AC/HC/AHC/LV etc.) 573 type.
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