Nexperia, 2 2-Input AND Schmitt Trigger Input Logic Gate, 8-Pin VSSOP
- RS庫存編號:
- 153-2935P
- 製造零件編號:
- 74AUP2G08DC,125
- 製造商:
- Nexperia
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可享批量折扣
小計 750 件 (以卷裝提供)*
HK$1,797.00
訂單超過 HK$250.00 免費送貨
暫時缺貨
- 從 2026年11月03日 發貨
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單位 | 每單位 |
|---|---|
| 750 - 1475 | HK$2.396 |
| 1500 + | HK$2.356 |
* 參考價格
- RS庫存編號:
- 153-2935P
- 製造零件編號:
- 74AUP2G08DC,125
- 製造商:
- Nexperia
規格
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Nexperia | |
| Product Type | Logic Gate | |
| Logic Function | AND | |
| Mount Type | Surface | |
| Number of Elements | 2 | |
| Number of Inputs per Gate | 2 | |
| Schmitt Trigger Input | Yes | |
| Package Type | VSSOP | |
| Pin Count | 8 | |
| Logic Family | AUP | |
| Input Type | CMOS | |
| Maximum Propagation Delay Time @ CL | 8.3ns | |
| Maximum High Level Output Current | -4mA | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Maximum Supply Voltage | 3.6V | |
| Series | 74AUP2G | |
| Standards/Approvals | No | |
| Minimum Supply Voltage | 0.8V | |
| Height | 0.85mm | |
| Length | 2.1mm | |
| Maximum Low Level Output Current | 4mA | |
| Output Type | ECL | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Nexperia | ||
Product Type Logic Gate | ||
Logic Function AND | ||
Mount Type Surface | ||
Number of Elements 2 | ||
Number of Inputs per Gate 2 | ||
Schmitt Trigger Input Yes | ||
Package Type VSSOP | ||
Pin Count 8 | ||
Logic Family AUP | ||
Input Type CMOS | ||
Maximum Propagation Delay Time @ CL 8.3ns | ||
Maximum High Level Output Current -4mA | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Maximum Supply Voltage 3.6V | ||
Series 74AUP2G | ||
Standards/Approvals No | ||
Minimum Supply Voltage 0.8V | ||
Height 0.85mm | ||
Length 2.1mm | ||
Maximum Low Level Output Current 4mA | ||
Output Type ECL | ||
Automotive Standard No | ||
Low-power dual 2-input AND gate, The 74AUP2G08 provides the dual 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Low static power consumption, ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options