Toshiba 74VHC32FT, Quad 2-Input OR Logic Gate, 14-Pin TSSOP
- RS庫存編號:
- 171-3400P
- 製造零件編號:
- 74VHC32FT
- 製造商:
- Toshiba
7350 現貨庫存,可於3工作日發貨。
單價 个 (以每卷裝提供) 連續帶的數量低於 150
HK$2.563
單位 | 每單位 |
---|---|
650 - 1200 | HK$2.563 |
1250 + | HK$2.523 |
- RS庫存編號:
- 171-3400P
- 製造零件編號:
- 74VHC32FT
- 製造商:
- Toshiba
The 74VHC32FT is an advanced high speed CMOS 2-INPUT OR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 4 stages including buffer output, which provide high noise immunity and stable output. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.
Wide operating temperature range: Topr = -40 to 125
High speed: fMAX = 165 MHz (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 4.0 μA (max) at Ta = 25
High noise immunity: VNIH = VNIL = 28% VCC (min)
Power-down protection is provided on all inputs.
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V
Low noise: VOLP = 0.8 V (max)
Pin and function compatible with the 74 series
(74AC/HC/AHC etc.) 32 type
High speed: fMAX = 165 MHz (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 4.0 μA (max) at Ta = 25
High noise immunity: VNIH = VNIL = 28% VCC (min)
Power-down protection is provided on all inputs.
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V
Low noise: VOLP = 0.8 V (max)
Pin and function compatible with the 74 series
(74AC/HC/AHC etc.) 32 type
For products that are Customized and under Non-cancellable & Non-returnable, Sales & Conditions apply.
Attribute | Value |
---|---|
Logic Function | OR |
Mounting Type | Surface Mount |
Number of Elements | 4 |
Number of Inputs per Gate | 2 |
Package Type | TSSOP |
Pin Count | 14 |
Logic Family | 74VHC |
Input Type | CMOS, TTL |
Maximum Operating Supply Voltage | 5.5 V |
Maximum High Level Output Current | -8mA |
Maximum Propagation Delay Time @ Maximum CL | 14.5 ns @ 50 pF |
Minimum Operating Supply Voltage | 2 V |
Maximum Low Level Output Current | 8mA |
Maximum Operating Temperature | +125 °C |
Output Type | Buffer, CMOS |
Propagation Delay Test Condition | 50pF |
Automotive Standard | AEC-Q100 |
Length | 5mm |
Width | 4.4mm |
Minimum Operating Temperature | -40 °C |
Dimensions | 5 x 4.4 x 1mm |
Height | 1mm |