The W9425G6KH is a 256M DDR SDRAM and speed involving -4/-5/-5I/-5A.
Up to 250 MHz Clock Frequency Double Data Rate architecture, two data transfers per clock cycle Differential clock inputs (CLK and /CLK) DQS is edge-aligned with data for Read, center-aligned with data for Write CAS Latency: 2, 2.5, and 3 Burst Length: 2, 4 and 8 Auto Refresh and Self Refresh Precharged Power Down and Active Power Down Write Data Mask Write Latency = 1 7.8μS refresh interval (8K/64 mS refresh) Maximum burst refresh cycle: 8 Interface: SSTL_2
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