The JTAG-HS3 programming cable allows high-speed programming/debugging of Xilinx FPGA and SoC devices from a host PC.
Features
• Separate Vref drives JTAG signal voltages • Vref can be any voltage between +1.8V and +5V • USB 2.0 HS port drives JTAG bus at up to 30Mbit/sec • Compatible with Xilinx ISE 14.1 and newer • Compatible with Xilinx Vivado 2013.3 and newer • PC connector: MicroUSB • JTAG connector: 2 x 7-pin 2mm • Open-drain buffer on pin 14 allows processor reset of Xilinx Zynq platform
Supported Target Devices
• Xilinx FPGAs
• Xilinx Zynq-7000
• Xilinx CoolRunner™/CoolRunner-II CPLDs
• Xilinx Platform Flash ISP configuration PROMs
• Selected third-party SPI PROMs
• Selected third-party BPI PROMs
Target Devices Not Supported
• Xilinx 9500/9500XL CPLDs
• Xilinx 1700 and 18V00 ISP configuration PROMs
• Xilinx FPGA eFUSE programming
Note
This cable is not needed for Digilent Xilinx FPGA boards as they have this functionality built-in.
Supplied with
USB cable
An FPGA is a semiconductor device consisting of a matrix of Configurable Logic Blocks (CLBs) connected through programmable interconnects. The user determines these interconnections by programming SRAM. A CLB can be simple (AND, OR gates, etc) or complex (a block of RAM). The FPGA allows changes to be made to a design even after the device is soldered into a PCB.
