Microchip Split Gate 32 MB SPI Flash Memory 8-Pin SOIJ, SST26VF032BT-104I/SM
- RS庫存編號:
- 177-9838
- Distrelec 貨號:
- 304-38-564
- 製造零件編號:
- SST26VF032BT-104I/SM
- 製造商:
- Microchip
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|---|---|---|
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* 參考價格
- RS庫存編號:
- 177-9838
- Distrelec 貨號:
- 304-38-564
- 製造零件編號:
- SST26VF032BT-104I/SM
- 製造商:
- Microchip
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Microchip | |
| Memory Size | 32MB | |
| Product Type | Flash Memory | |
| Interface Type | SPI | |
| Package Type | SOIJ | |
| Pin Count | 8 | |
| Organisation | 4M x 8 bit | |
| Mount Type | Surface | |
| Maximum Clock Frequency | 104MHz | |
| Cell Type | Split Gate | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Supply Voltage | 2.3V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | No | |
| Width | 5.25 mm | |
| Height | 1.98mm | |
| Length | 5.26mm | |
| Automotive Standard | AEC-Q100 | |
| Series | SST26 | |
| Supply Current | 20mA | |
| Number of Bits per Word | 8 | |
| 選取全部 | ||
|---|---|---|
品牌 Microchip | ||
Memory Size 32MB | ||
Product Type Flash Memory | ||
Interface Type SPI | ||
Package Type SOIJ | ||
Pin Count 8 | ||
Organisation 4M x 8 bit | ||
Mount Type Surface | ||
Maximum Clock Frequency 104MHz | ||
Cell Type Split Gate | ||
Maximum Supply Voltage 3.6V | ||
Minimum Supply Voltage 2.3V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals No | ||
Width 5.25 mm | ||
Height 1.98mm | ||
Length 5.26mm | ||
Automotive Standard AEC-Q100 | ||
Series SST26 | ||
Supply Current 20mA | ||
Number of Bits per Word 8 | ||
The SST26VF032B Serial Quad I/O (SQI) flash device utilizes a 4-bit multiplexed I/O serial interface to boost performance while maintaining the compact form factor of standard serial flash devices. SST26VF032B also support full command-set compatibility to traditional Serial Peripheral Interface (SPI) protocol. Operating at frequencies reaching 104 MHz, the SST26VF032B enables minimum latency execute-in-place (XIP) capability without the need for code shadowing on an SRAM.
Serial Interface Architecture- Nibble-wide multiplexed I/O’s with SPI-like serial command structure
Burst Modes- Continuous linear burst, 8/16/32/64 Byte linear burst with wrap-around
Flexible Erase Capability- Uniform 4 KByte sectors, Four 8 KByte top and bottom parameter overlay blocks, One 32 KByte top and bottom overlay block, Uniform 64 KByte overlay blocks
Software Write Protection- Individual Block-Locking
Low Power Consumption
SFDP (Serial Flash Discoverable Parameters)
相关链接
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