Infineon NOR 128Mbit Quad-SPI Flash Memory 8-Pin WSON, S25FL128LAGNFI010
- RS庫存編號:
- 181-1563
- 製造零件編號:
- S25FL128LAGNFI010
- 製造商:
- Infineon
可享批量折扣
小計(1 托盤,共 490 件)*
HK$6,384.70
訂單超過 HK$250.00 免費送貨
暫時缺貨
- 從 2026年12月23日 發貨
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單位 | 每單位 | 每托盤* |
|---|---|---|
| 490 - 1960 | HK$13.03 | HK$6,384.70 |
| 2450 + | HK$12.769 | HK$6,256.81 |
* 參考價格
- RS庫存編號:
- 181-1563
- 製造零件編號:
- S25FL128LAGNFI010
- 製造商:
- Infineon
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Infineon | |
| Memory Size | 128Mbit | |
| Interface Type | Quad-SPI | |
| Package Type | WSON | |
| Pin Count | 8 | |
| Organisation | 16M x 8 bit | |
| Mounting Type | Surface Mount | |
| Cell Type | NOR | |
| Minimum Operating Supply Voltage | 2.7 V | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Block Organisation | Symmetrical | |
| Length | 5.28mm | |
| Height | 1.9mm | |
| Width | 5.28mm | |
| Dimensions | 5.28 x 5.28 x 1.9mm | |
| Number of Bits per Word | 8bit | |
| Minimum Operating Temperature | -40 °C | |
| Maximum Operating Temperature | +85 °C | |
| Automotive Standard | AEC-Q100 | |
| Maximum Random Access Time | 8ns | |
| Series | S25FL | |
| Number of Words | 16M | |
| 選取全部 | ||
|---|---|---|
品牌 Infineon | ||
Memory Size 128Mbit | ||
Interface Type Quad-SPI | ||
Package Type WSON | ||
Pin Count 8 | ||
Organisation 16M x 8 bit | ||
Mounting Type Surface Mount | ||
Cell Type NOR | ||
Minimum Operating Supply Voltage 2.7 V | ||
Maximum Operating Supply Voltage 3.6 V | ||
Block Organisation Symmetrical | ||
Length 5.28mm | ||
Height 1.9mm | ||
Width 5.28mm | ||
Dimensions 5.28 x 5.28 x 1.9mm | ||
Number of Bits per Word 8bit | ||
Minimum Operating Temperature -40 °C | ||
Maximum Operating Temperature +85 °C | ||
Automotive Standard AEC-Q100 | ||
Maximum Random Access Time 8ns | ||
Series S25FL | ||
Number of Words 16M | ||
The FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO) and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock. The architecture features a Page Programming Buffer that allows up to 256-bytes to be programmed in one operation and provides individual 4KB sector, 32KB half block, 64KB block, or entire chip erase. By using FL-L family devices at the higher clock rates supported, with Quad commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR Flash memories, while reducing signal count dramatically. The FL-L family products offer high densities coupled with the flexibility and fast performance required by a variety of mobile or embedded applications. Provides an ideal storage solution for systems with limited space, signal connections, and power. These memories offer flexibility and performance well beyond ordinary serial flash devices. They are ideal for code shadowing to RAM, executing code directly (XIP), and storing re-programmable data.
For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.
相关链接
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