Infineon NOR 64 MB SPI Flash Memory 8-Pin SOIC, S25FL064LABMFI013
- RS庫存編號:
- 215-5783
- 製造零件編號:
- S25FL064LABMFI013
- 製造商:
- Infineon
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單位 | 每單位 | 每包* |
|---|---|---|
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| 530 - 1040 | HK$8.40 | HK$84.00 |
| 1050 + | HK$8.22 | HK$82.20 |
* 參考價格
- RS庫存編號:
- 215-5783
- 製造零件編號:
- S25FL064LABMFI013
- 製造商:
- Infineon
規格
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Infineon | |
| Product Type | Flash Memory | |
| Memory Size | 64MB | |
| Interface Type | SPI | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Organisation | 8 M x 8 | |
| Mount Type | Surface | |
| Maximum Clock Frequency | 108MHz | |
| Cell Type | NOR | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Supply Voltage | 2.7V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Height | 1.9mm | |
| Length | 5.28mm | |
| Width | 5.28 mm | |
| Standards/Approvals | No | |
| Series | S25FL | |
| Number of Words | 8M | |
| Number of Bits per Word | 8 | |
| Maximum Random Access Time | 8ns | |
| Automotive Standard | AEC-Q100 | |
| 選取全部 | ||
|---|---|---|
品牌 Infineon | ||
Product Type Flash Memory | ||
Memory Size 64MB | ||
Interface Type SPI | ||
Package Type SOIC | ||
Pin Count 8 | ||
Organisation 8 M x 8 | ||
Mount Type Surface | ||
Maximum Clock Frequency 108MHz | ||
Cell Type NOR | ||
Maximum Supply Voltage 3.6V | ||
Minimum Supply Voltage 2.7V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Height 1.9mm | ||
Length 5.28mm | ||
Width 5.28 mm | ||
Standards/Approvals No | ||
Series S25FL | ||
Number of Words 8M | ||
Number of Bits per Word 8 | ||
Maximum Random Access Time 8ns | ||
Automotive Standard AEC-Q100 | ||
The Cypress Semiconductor FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO), and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock.
Serial Peripheral Interface (SPI) with Multi-I/O
Read
Program Architecture
Erase Architecture
100,000 Program-Erase Cycles, minimum
20 Year Data Retention, minimum
Security Features
相关链接
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