STMicroelectronics STGWA50M65DF2AG, Type N-Channel Single IGBT, 119 A 650 V, 3-Pin TO-247, Through Hole
- RS庫存編號:
- 215-009
- 製造零件編號:
- STGWA50M65DF2AG
- 製造商:
- STMicroelectronics
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- RS庫存編號:
- 215-009
- 製造零件編號:
- STGWA50M65DF2AG
- 製造商:
- STMicroelectronics
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | STMicroelectronics | |
| Product Type | IGBT | |
| Maximum Continuous Collector Current Ic | 119A | |
| Maximum Collector Emitter Voltage Vceo | 650V | |
| Maximum Power Dissipation Pd | 576W | |
| Number of Transistors | 1 | |
| Configuration | Single | |
| Package Type | TO-247 | |
| Mount Type | Through Hole | |
| Channel Type | Type N | |
| Pin Count | 3 | |
| Maximum Collector Emitter Saturation Voltage VceSAT | 2V | |
| Maximum Gate Emitter Voltage VGEO | ±20 V | |
| Minimum Operating Temperature | -55°C | |
| Maximum Operating Temperature | 175°C | |
| Standards/Approvals | No | |
| Length | 20.1mm | |
| Width | 15.70 to 15.90 mm | |
| Automotive Standard | AEC-Q101 | |
| 選取全部 | ||
|---|---|---|
品牌 STMicroelectronics | ||
Product Type IGBT | ||
Maximum Continuous Collector Current Ic 119A | ||
Maximum Collector Emitter Voltage Vceo 650V | ||
Maximum Power Dissipation Pd 576W | ||
Number of Transistors 1 | ||
Configuration Single | ||
Package Type TO-247 | ||
Mount Type Through Hole | ||
Channel Type Type N | ||
Pin Count 3 | ||
Maximum Collector Emitter Saturation Voltage VceSAT 2V | ||
Maximum Gate Emitter Voltage VGEO ±20 V | ||
Minimum Operating Temperature -55°C | ||
Maximum Operating Temperature 175°C | ||
Standards/Approvals No | ||
Length 20.1mm | ||
Width 15.70 to 15.90 mm | ||
Automotive Standard AEC-Q101 | ||
- COO (Country of Origin):
- CN
The STMicroelectronics IGBT developed using an Advanced proprietary trench gate fieldstop structure. The device is part of the M series IGBTs, which represent an optimal balance between inverter system performance and efficiency where the low-loss and the short-circuit functionality is essential. Furthermore, the positive VCE(sat) temperature coefficient and the tight parameter distribution result in safer paralleling operation.
Minimized tail current
Tight parameter distribution
Safer paralleling
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