Infineon Isolated OptiMOS 2 Type N-Channel MOSFET, 300 mA, 60 V Enhancement, 6-Pin SC-88
- RS庫存編號:
- 827-0002
- 製造零件編號:
- 2N7002DWH6327XTSA1
- 製造商:
- Infineon
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HK$421.50
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單位 | 每單位 | 每卷* |
|---|---|---|
| 500 - 500 | HK$0.843 | HK$421.50 |
| 1000 - 1000 | HK$0.822 | HK$411.00 |
| 1500 + | HK$0.81 | HK$405.00 |
* 參考價格
- RS庫存編號:
- 827-0002
- 製造零件編號:
- 2N7002DWH6327XTSA1
- 製造商:
- Infineon
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Infineon | |
| Channel Type | Type N | |
| Product Type | MOSFET | |
| Maximum Continuous Drain Current Id | 300mA | |
| Maximum Drain Source Voltage Vds | 60V | |
| Package Type | SC-88 | |
| Series | OptiMOS | |
| Mount Type | Surface | |
| Pin Count | 6 | |
| Maximum Drain Source Resistance Rds | 4Ω | |
| Channel Mode | Enhancement | |
| Minimum Operating Temperature | -55°C | |
| Typical Gate Charge Qg @ Vgs | 0.4nC | |
| Maximum Power Dissipation Pd | 500mW | |
| Forward Voltage Vf | 0.96V | |
| Transistor Configuration | Isolated | |
| Maximum Operating Temperature | 150°C | |
| Length | 2mm | |
| Standards/Approvals | No | |
| Height | 0.8mm | |
| Number of Elements per Chip | 2 | |
| Automotive Standard | AEC-Q101 | |
| 選取全部 | ||
|---|---|---|
品牌 Infineon | ||
Channel Type Type N | ||
Product Type MOSFET | ||
Maximum Continuous Drain Current Id 300mA | ||
Maximum Drain Source Voltage Vds 60V | ||
Package Type SC-88 | ||
Series OptiMOS | ||
Mount Type Surface | ||
Pin Count 6 | ||
Maximum Drain Source Resistance Rds 4Ω | ||
Channel Mode Enhancement | ||
Minimum Operating Temperature -55°C | ||
Typical Gate Charge Qg @ Vgs 0.4nC | ||
Maximum Power Dissipation Pd 500mW | ||
Forward Voltage Vf 0.96V | ||
Transistor Configuration Isolated | ||
Maximum Operating Temperature 150°C | ||
Length 2mm | ||
Standards/Approvals No | ||
Height 0.8mm | ||
Number of Elements per Chip 2 | ||
Automotive Standard AEC-Q101 | ||
Infineon OptiMOS Series MOSFET, 60V Drain Source Voltage, 4Ω Drain Source Resistance - 2N7002DWH6327XTSA1
This MOSFET is a surface-mount N-channel transistor designed for low-power switching in constrained assemblies. It operates in enhancement mode and combines two elements on a single chip to deliver compact dual-die switching suitable for automotive-rated and industrial environments. The device is intended for board-level applications requiring modest current handling and controlled on-resistance.
Features and Benefits:
• 60V drain rating enables higher-voltage switching applications
• 4Ω maximum Rds reduces conduction losses during on-state
• 300mA continuous drain current supports low-current loads
• 0.4nC typical gate charge allows fast, efficient switching
• 500mW power dissipation suits low-power, thermally limited designs
• -55°C to 150°C operating range ensures thermal endurance
• 4Ω maximum Rds reduces conduction losses during on-state
• 300mA continuous drain current supports low-current loads
• 0.4nC typical gate charge allows fast, efficient switching
• 500mW power dissipation suits low-power, thermally limited designs
• -55°C to 150°C operating range ensures thermal endurance
Applications
• Suitable for microcontroller-driven load switching
• Ideal for interfacing sensors in automotive systems
• Used with battery-management balancing circuits
• Can be used for small relay replacement duties
• Appropriate for compact SMD power-path control
• Ideal for interfacing sensors in automotive systems
• Used with battery-management balancing circuits
• Can be used for small relay replacement duties
• Appropriate for compact SMD power-path control
What package and pin count should I prepare for PCB layout?
The device is supplied in a small SC-88 surface-mount package with six pins, so pads and thermal relief should match the SC-88 footprint.
How does the dual-element chip affect parallel operation?
Two elements on the same die permit compact dual-channel arrangements without external matching, but total thermal limits remain per package.
What gate and drain voltage limits must be observed?
The gate-source voltage must not exceed ±20V while the drain-source voltage limit is 60V to avoid device stress.
What forward voltage can be expected when conducting?
A forward voltage measurement of approximately 0.96V applies under specified test conditions for relevant conduction paths.
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