Microchip AVR32SD28-I/SP 10 Bit, AVR SD Family Microcontroller, 20 MHz, 32kB FLASH, 28-Pin SPDIP
- RS庫存編號:
- 427-684
- 製造零件編號:
- AVR32SD28-I/SP
- 製造商:
- Microchip
小計(1 包,共 2 件)*
HK$43.60
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單位 | 每單位 | 每包* |
|---|---|---|
| 2 + | HK$21.80 | HK$43.60 |
* 參考價格
- RS庫存編號:
- 427-684
- 製造零件編號:
- AVR32SD28-I/SP
- 製造商:
- Microchip
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產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Microchip | |
| Series | AVR SD Family | |
| Product Type | Microcontroller | |
| Package Type | SPDIP | |
| Mount Type | Surface | |
| Pin Count | 28 | |
| Device Core | 10 Bit | |
| Interface Type | UPDI, SPI, USART, I2C | |
| Program Memory Size | 32kB | |
| Maximum Clock Frequency | 20MHz | |
| RAM Size | 8kB | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| Analogue Comparators | 3 | |
| Number of Programmable I/Os | 25 | |
| DACs | 1 x 10 Bit | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | ISO 26262 | |
| Minimum Supply Voltage | 2.7V | |
| Program Memory Type | FLASH | |
| Number of Timers | 7 | |
| ADCs | 2 x 10 Bit | |
| Automotive Standard | ISO 26262 | |
| 選取全部 | ||
|---|---|---|
品牌 Microchip | ||
Series AVR SD Family | ||
Product Type Microcontroller | ||
Package Type SPDIP | ||
Mount Type Surface | ||
Pin Count 28 | ||
Device Core 10 Bit | ||
Interface Type UPDI, SPI, USART, I2C | ||
Program Memory Size 32kB | ||
Maximum Clock Frequency 20MHz | ||
RAM Size 8kB | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
Analogue Comparators 3 | ||
Number of Programmable I/Os 25 | ||
DACs 1 x 10 Bit | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals ISO 26262 | ||
Minimum Supply Voltage 2.7V | ||
Program Memory Type FLASH | ||
Number of Timers 7 | ||
ADCs 2 x 10 Bit | ||
Automotive Standard ISO 26262 | ||
- COO (Country of Origin):
- TH
The Microchip Dual Core microcontrollers is designed in compliance with the ISO 26262 functional safety standard, incorporate the AVR CPU with a hardware multiplier. It uses latest technologies, with a flexible and low-power architecture, including an Event System, accurate analogue features, and advanced digital peripherals. It provides a dual-core lockstep CPU, Single Error Correcting and Double Error Detecting ECC on Flash, EEPROM and SRAM, Error Controller for functional safety, and Program and Debug Interface Disable for security.
Flash memory 32 KB
28 pins
Packaging type SPDIP
RoHS compliant
相关链接
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