Renesas Electronics R5F52306ADFL#30, 32 bit RXv2, RX230 Microcontroller, 54 MHz, 256kB FLASH, 48-Pin LQFP
- RS庫存編號:
- 262-7117P
- 製造零件編號:
- R5F52306ADFL#30
- 製造商:
- Renesas Electronics
此圖片僅供參考，請參閲產品詳細資訊及規格
可享批量折扣
查看批量定價選項小計 10 件 (以盤裝提供)*
HK$338.50
訂單超過 HK$250.00 免費送貨
最後的 RS 庫存
- 最終 448 個，準備發貨
單位 | 每單位 |
|---|---|
| 10 - 18 | HK$33.85 |
| 20 - 98 | HK$33.10 |
| 100 - 198 | HK$27.65 |
| 200 + | HK$27.15 |
* 參考價格
- RS庫存編號:
- 262-7117P
- 製造零件編號:
- R5F52306ADFL#30
- 製造商:
- Renesas Electronics
規格
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法例與合規
產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Series | RX230 | |
| Product Type | Microcontroller | |
| Package Type | LQFP | |
| Mount Type | Surface | |
| Pin Count | 48 | |
| Device Core | RXv2 | |
| Data Bus Width | 32bit | |
| Program Memory Size | 256kB | |
| Maximum Clock Frequency | 54MHz | |
| RAM Size | 32kB | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| DACs | 12 bit | |
| Maximum Operating Temperature | 85°C | |
| Width | 7mm | |
| Standards/Approvals | RoHS | |
| Length | 7mm | |
| Height | 1.7mm | |
| Minimum Supply Voltage | 1.8V | |
| Instruction Set Architecture | CISC | |
| Number of Timers | 2 | |
| Program Memory Type | FLASH | |
| Automotive Standard | No | |
| ADCs | 8 x 12 Bit | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Series RX230 | ||
Product Type Microcontroller | ||
Package Type LQFP | ||
Mount Type Surface | ||
Pin Count 48 | ||
Device Core RXv2 | ||
Data Bus Width 32bit | ||
Program Memory Size 256kB | ||
Maximum Clock Frequency 54MHz | ||
RAM Size 32kB | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
DACs 12 bit | ||
Maximum Operating Temperature 85°C | ||
Width 7mm | ||
Standards/Approvals RoHS | ||
Length 7mm | ||
Height 1.7mm | ||
Minimum Supply Voltage 1.8V | ||
Instruction Set Architecture CISC | ||
Number of Timers 2 | ||
Program Memory Type FLASH | ||
Automotive Standard No | ||
ADCs 8 x 12 Bit | ||
- COO (Country of Origin):
- CN
The Renesas Electronics RX230 Group of devices leverages an optimal combination of a 32-bit RXv2 CPU core with improved DSP/FPU and low-power consumption technology to realize extreme power efficiency. High-performance digital filtering, floating-point op
CISC Harvard architecture with 5-stage pipeline
Variable-length instructions, ultra-compact code
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